Trench MOSFET with integrated Schottky barrier diode

ABSTRACT

A Schottky diode includes a semiconductor layer formed on a semiconductor substrate; first and second trenches formed in the semiconductor layer where the first and second trenches are lined with a thin dielectric layer and being filled partially with a trench conductor layer and remaining portions of the first and second trenches are filled with a first dielectric layer; and a Schottky metal layer formed on a top surface of the semiconductor layer between the first trench and the second trench. The Schottky diode is formed with the Schottky metal layer as the anode and the semiconductor layer between the first and second trenches as the cathode. The trench conductor layer in each of the first and second trenches is electrically connected to the anode of the Schottky diode. In one embodiment, the Schottky diode is formed integrated with a trench field effect transistor on the same semiconductor substrate.

FIELD OF THE INVENTION

The invention relates to semiconductor devices and, in particular, to atrench MOSFET device with a Schottky barrier diode integrated therein.

DESCRIPTION OF THE RELATED ART

A Schottky junction is characterized by a lower energy barrier (for freecarriers) than a PN diode junction, and unipolar current conduction, asopposed to bipolar current conduction as in the PN diode case. As such,Schottky diodes begin current conduction at a lower forward voltage thana typical PN junction diode, but also have reversed bias leakagecurrents that are higher than a typical PN junction diode. BecauseSchottky diodes are unipolar devices, they typically switch faster thana PN junction diode.

Schottky diodes are typically used in electronic applications to providerectification. For instance, in applications where a power converterimplements synchronous rectification, the power converter uses a powerMOSFET for the high side switch and another power MOSFET as the low-sideswitch where the two power MOSFETs operate to regulate the delivery ofcurrent to the load. In operation, both switches are off before one isbeing turned on. During the time when both switches are turned off, thebody diode of the power MOSFET conducts current. However, in order toimprove conversion efficiency, a Schottky diode is often added inparallel with the MOSFET body diode, as shown in FIG. 1. An N-type powerMOSFET M1 has a body diode D1 formed by the P-type body region as theanode and the N-type drain region as the cathode. To improve theperformance of the power MOSFET M1, a Schottky diode SD1 is connected inparallel with the body diode D1. The anode of the Schottky diode SD1 iselectrically connected to the source terminal of the power MOSFET M1 orthe anode of the body diode D1. The cathode of the Schottky diode SD1 iselectrically connected to the drain terminal of the power MOSFET M1 orthe cathode of the body diode D1. The Schottky diode SD1 has a lowerforward bias voltage than the body diode D1 and thus reduces the forwardvoltage drop as well as improves recovery time.

SUMMARY OF THE INVENTION

According to one embodiment of the present invention, a Schottky diodeincludes a semiconductor substrate of a first conductivity type; asemiconductor layer of the first conductivity type formed on thesemiconductor substrate; first and second trenches formed in thesemiconductor layer where the first and second trenches are lined with athin dielectric layer and being filled partially with a trench conductorlayer and remaining portions of the first and second trenches are filledwith a first dielectric layer; and a Schottky metal layer formed on atop surface of the semiconductor layer between the first trench and thesecond trench. The Schottky diode is formed with the Schottky metallayer as the anode and the semiconductor layer between the first andsecond trenches as the cathode. The trench conductor layer in each ofthe first and second trenches is electrically connected to the anode ofthe Schottky diode.

According to another aspect of the present invention, a semiconductordevice including a field effect transistor and a Schottky diode includesa semiconductor substrate of a first conductivity type; a semiconductorlayer of the first conductivity type formed on the semiconductorsubstrate; first and second trenches formed in the semiconductor layerwhere the first and second trenches are lined with a thin dielectriclayer and being filled with a first trench conductor layer and remainingportions of the first and second trenches are filled with a firstdielectric layer; a Schottky metal layer formed on a top surface of thesemiconductor layer between the first trench and the second trench; athird trench formed in the semiconductor layer where the third trench islined with the thin dielectric layer and being filled with the firsttrench conductor layer and a second trench conductor layer, the firsttrench conductor layer being insulated from the second trench conductorlayer by an inter-layer dielectric layer and the first trench conductorlayer filling a portion of the third trench and the second trenchconductor layer extending from the inter-layer dielectric to near a topsurface of the third trench; a first well region of a secondconductivity type formed in a top portion of the semiconductor layeradjacent the third trench where the first well region extends to a depthnear a bottom edge of the second trench conductor layer formed in thethird trench; and a heavily doped source region of the firstconductivity type formed in the first well region adjacent to thesidewall of the third trench.

The Schottky diode is formed with the Schottky metal layer as the anodeand the semiconductor layer between the first and second trenches as thecathode. The field effect transistor is formed with the heavily dopedN-type semiconductor substrate as a drain electrode, the second trenchconductor layer in the third trench as the gate electrode, the firstwell region as the body region, the heavily doped source region as thesource electrode, the first trench conductor layer in the third trenchas a gate shielding electrode. The first trench conductor layer in thethird trench is electrically connected to the source electrode and thefirst trench conductor layer in each of the first and second trenchesare electrically connected to the anode of the Schottky diode.

The present invention is better understood upon consideration of thedetailed description below and the accompanying drawings.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a circuit diagram illustrating the parallel connection of aSchottky diode with a power MOSFET and the body diode of the powerMOSFET.

FIG. 2 is a cross-sectional view of a trench MOSFET device with anintegrated Schottky diode according to one embodiment of the presentinvention.

FIG. 3 is an isometric view of the trench Schottky diode of FIG. 2illustrating the longitudinal axis of the trenches and the mesa in whichthe Schottky diode is formed.

FIG. 4 is an isometric view of the trench Schottky diode according to afirst alternate embodiment of the present invention.

FIG. 5 is a cross-sectional view of the trench Schottky diode in FIG. 4along the longitudinal line A-A′ according to one embodiment of thepresent invention.

FIG. 6 is an isometric view of the trench Schottky diode according to asecond alternate embodiment of the present invention.

FIG. 7 is a cross-sectional view of the trench Schottky diode in FIG. 6along the longitudinal line A-A′ according to one embodiment of thepresent invention.

FIG. 8 is an isometric view of the trench Schottky diode according to athird alternate embodiment of the present invention.

FIG. 9 is a cross-sectional view of the trench Schottky diode in FIG. 8along the longitudinal line A-A′ according to one embodiment of thepresent invention.

FIG. 10 is an isometric view of the trench Schottky diode according to afourth alternate embodiment of the present invention.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

In accordance with the principles of the present invention, a Schottkydiode is integrated into a trench MOSFET structure by utilizing mesasbordered by trenches that are only partially filled with a trenchconductor where the trench conductor is electrically connected to theanode of the Schottky diode. In this manner, the standard fabricationprocess for the trench MOSFET device can be used to form a “trench”Schottky diode to allow the seamless integration of the Schottky diodeinto the trench MOSFET device structure.

FIG. 2 is a cross-sectional view of a trench MOSFET device with anintegrated Schottky diode according to one embodiment of the presentinvention. Referring to FIG. 2, a trench MOSFET (metal-oxide-siliconfield effect transistor) device 10 and a trench Schottky diode 20 areformed on a semiconductor body. In the present illustration, thesemiconductor body includes an N-type epitaxial layer 22 formed on aheavily doped N+ substrate 21. In other embodiments, the semiconductorbody may include an P-type semiconductor substrate with the P-typeepitaxial layer formed thereon. The exact structure of the semiconductorbody is not critical to the practice of the present invention. Trenches12 (including trenches 12 a to 12 c) are formed in the N-type epitaxiallayer 22 to define mesas in which diffusion regions are to be formed.The walls of the trenches 12 a-12 c are lined with a dielectric layer15, such as a silicon oxide layer.

A first trench conductor layer 13 is formed in bottom portions of thetrenches 12. More specifically, the first trench conductor layers 13 ato 13 c are formed in each of the trenches 12 a to 12 c. In embodimentsof the present invention, the first trench conductor layer 13 is apolysilicon layer. An inter-poly dielectric layer 17 is formed on thefirst trench conductor layer. Then, in trench 12 a associated with thetrench MOSFET device 10, a second trench conductor layer 14 is formedabove the inter-poly dielectric layer 17. In embodiments of the presentinvention, the second trench conductor layer 14 is a polysilicon layer.The second trench conductor layer is sometimes referred to as the gateconductor layer, a gate poly layer, or a gate electrode, as it functionsas the gate conductor of the MOSFET device. The trenches 12 b and 12 c,bordering the mesa in which the trench Schottky diode 20 is to be form,are not filled with the second conductor layer 14 but instead theremaining portions of the trenches are filled with a dielectric layer19, such as a silicon oxide layer. As a result, trenches 12 b and 12 care only partially filled with a trench conductor layer.

P-wells 24 are formed in the mesas in which the trench MOSFET device isto be formed. For instance, P-well 24 is formed in the mesa adjacenttrench 12 a and between trenches 12 a and 12 b where the trench MOSFETdevice 10 is to be formed. P-well 24 extends to at least near the bottomof the gate poly layer in the adjacent trench 12 a. The mesa betweentrenches 12 b and 12 c in which the trench Schottky diode 20 is to beformed do not receive the P-well implants and thus remains lightly dopedN-type with the doping concentration of the N-type epitaxial layer. TheP-wells 24 form the body region of the trench MOSFET device with theN-type epitaxial layer 22 forming the drain region. The N+ substrate 21forms the backside drain electrode of the trench MOSFET device. Heavilydoped N+ regions 16 are formed at the top portions of the mesas in whichthe trench MOSFET device is to be formed. Thus, heavily doped N+ regions16 are formed in the mesa between trenches 12 a and 12 b and in the mesaadjacent trench 12 a. A dielectric layer 18 is formed over thesemiconductor body and is then patterned to form source-body contactopenings in the mesas adjacent the N+ regions 16. The contact openingsextend through the N+ source regions 16 into the P-well body regions 24.The contact openings are then filled with a source metal layer 26 toelectrically connect the N+ source regions 16 to the P-well body regions24. The source metal layer 26 filling the contact openings is sometimesreferred to as a source contact plug 26 or a source plug 26 and thesource metal layer 26 fills the contact opening made in the sourceregions 16 and the P-well s 24. In some embodiments, the source contactplug 26 is a tungsten plug. In some embodiments, before the sourcecontact openings are filled, an optional P-type body contact diffusionregion 23 may be formed by P+ implantation at the bottom of thesource-body contact openings to improve the ohmic contact between thesource plug and the P-well body regions 24.

After the source plugs 26 are formed, a metal layer 38 may be formedover the source plugs 26 and the dielectric layer 18 to form theelectrical connection to the source regions and well regions. In someembodiments, the metal layer 38 is an aluminum layer. Subsequentdielectric or insulating layers (not shown) may be formed over the metallayer 38. Electrical contact to the drain region (N-type epitaxial layer22) and to the first and second trench conductor layers may be formed inthe mesas between the trenches, in a third dimension perpendicular tothe cross-section shown in FIG. 2.

As thus formed, trench MOSFET device 10 includes a gate region formed inthe gate poly layer 14, a source region formed in the N+ regions 16, adrain region formed in the N-type epitaxial layer 22 and a body regionformed in the P-wells 24. MOSFET device 10 is a shielded gate trenchMOSFET device as the first trench conductor layer 13 shields the gatepoly layer 14 from high voltages. The first trench conductor layer istherefore sometimes referred to as a shield poly layer or a gateshielding electrode. The shield poly layer 13 is electrically connectedto the source region of the MOSFET device 10. In some embodiments, thesource region of the MOSFET device 10 is electrically connected toground and the shield poly layer 13 is also electrically connected tothe ground potential. The electrical connection to the shield poly layer13 can be provided in the mesas between the trenches, in a thirddimension perpendicular to the cross-section shown in FIG. 2.

The trench Schottky diode 20 is formed in a mesa 27 between trenches 12b and 12 c. As described above, the mesa between trenches 12 b and 12 cdoes not receive the P-well implant and thus the mesa retains the dopinglevel of the N-type epitaxial layer 22. To form the Schottky barrierdiode, a Schottky metal layer 28 is formed on the surface of and inelectrical contact with the mesa 27. FIG. 3 is an isometric view of thetrench Schottky diode 20 illustrating the longitudinal axis of thetrenches and the mesa in which the Schottky diode is formed. Referringto FIG. 3, a Schottky junction is formed at the metal-silicon junctionof the Schottky metal layer 28 and the N-type epitaxial layer 22 at mesa27. The mesa 27 forms the cathode of the Schottky diode while theSchottky metal layer 28 forms the anode of the Schottky diode. Inembodiments of the present invention, additional metal layers may beformed on the Schottky metal layer 28 to improve the electricalconduction. In the present embodiment, a metal layer 30 is formed on topof the Schottky metal layer 28. In one embodiment, the metal layer 30 isa composite metal layer including a tungsten layer and analuminum-silicon layer.

A salient feature of the trench Schottky diode 20 of the presentinvention is that the Schottky diode is formed in a mesa 27 bordered bytrenches 12 b, 12 c that are only partially filled with a trenchconductor layer and the trench conductor layer is electrically connectedto the anode of the Schottky diode. In the present embodiment, thetrenches 12 b, 12 c bordering the mesa 27 of the Schottky diode 20 arefilled with only the shield poly layer 13 b, 13 c. The gate poly layeris not formed in trenches 12 b, 12 c. In this manner, the trenchSchottky diode can be formed using the same fabrication process as thetrench MOSFET with the modification of omitting the gate poly layer inthe trenches 12 b, 12 c and modifying the P-well regions in mesa 27. Inthe present embodiment, the P-well region is omitted entirely in mesa27. In alternate embodiments of the present invention, separate P-wellregions may be formed interspersed or spaced apart along thelongitudinal axis of the mesa where the Schottky diode is formed inN-type epitaxial layer between the P-well regions, as will be describedin more detail below.

Another salient feature of the trench Schottky diode 20 of the presentinvention is that the same mesa width can be used for the trench MOSFETdevice and the trench Schottky diode. The trench Schottky diode does notrequire a narrowed mesa as in the case of the conventional devices. Theuse of a wider mesa width for the Schottky diode has the advantage ofimproving the series resistance of the Schottky diode, thereby improvingthe efficiency of the Schottky diode. In one embodiment, the Schottkydiode is formed in a mesa that is also used for forming electricalcontact to the shield poly layer. Accordingly, integrating the Schottkydiode into the trench MOSFET device realizes efficient use of siliconreal estate.

In another embodiment of the present invention, the trench conductorlayer partially filing trenches 12 b and 12 c for the Schottky diode canbe any other types of conductor layer, including metal and polysilicon.Furthermore, in embodiments of the present invention, the trenches 12 band 12 c for the Schottky diode are filled with a trench conductor layerup to about half of the trench depth or less than half of the trenchdepth. In yet another embodiment, the trench conductor layer 13 b, 13 cin the trenches 12 b and 12 c for the Schottky diode can be electricallyconnected to the shield poly layer 13 a of the trench MOSFET device 10and be electrically connected to the source potential of the MOSFETdevice.

In some embodiments, a shallow compensation implant 29 is applied to thetop surface of mesa 27 to adjust the barrier height at the surface ofmesa 27 near the Schottky diode function. In embodiments of the presentinvention, the shallow compensation implant 29 is a P-type ionimplantation into the N-Epitaxial layer 22. The depth and dose of theshallow compensation implant 29 are selected to adjust the forward biasvoltage and the breakdown leakage current of the Schottky diode 20. Theimplant dose of the shallow compensation implant may or may not besufficient to overcome the base doping concentration of the N-Epitaxiallayer 22. Thus, the resulting implanted region at the surface of themesa 27 may be converted to P-type or may remain N-type.

In some embodiments, one or more deep pocket compensation implants 35are applied in the N-type epitaxial layer 22 away from the Schottkyjunction and deep in the mesa structure. The deep pocket compensationimplants 35 may be N-type implants or P-type implants. The implant dosesof the deep pocket compensation implants 35 are selected so that thebase doping concentration of the N-Epitaxial layer 22 is not overcome bythe deep pocket compensation implants. Thus, the resulting implantedregions remain N-type but with barrier height adjusted by thecompensation implants. The deep pocket compensation implants 35 have theeffect of controlling the current path of the Schottky diode to reduceleakage current.

FIG. 4 is an isometric view of the trench Schottky diode according to afirst alternate embodiment of the present invention. Referring to FIG.4, a trench Schottky diode 40 is formed in substantially the same manneras trench Schottky diode 20 described above. More specifically, trenchSchottky diode 40 is formed in a mesa 27 between two trenches 12 b and12 c that are only partially filled with a trench conductor layer 13 band 13 c. In the present embodiment, P-well regions 24 are formedinterspersed or spaced apart in mesa 27 along the longitudinal axis ofthe mesa. The longitudinal axis of the mesa is parallel to thelongitudinal axis of the trenches. Therefore, the P-well regions 24extend from one trench side wall to the next, such as from the sidewallof trench 12 b to the sidewall of trench 12 c. The P-well regions arespaced apart along the longitudinal axis of the mesa to form individualP-well regions along the length of the mesa. In the present embodiment,the Schottky metal layer 48 is formed as a long stripe overlying theP-well regions as well as the N-type epitaxial region in between theP-well regions. In one embodiment, the Schottky metal stripe 48 has awidth narrower than the width of the mesa between two adjacent trenches12 b, 12 c. As thus formed, the trench Schottky diode 40 is formed at aSchottky junction between the Schottky metal layer 48 and the N-typeepitaxial layer 22 and as well as between a Schottky junction betweenthe Schottky metal layer 48 and the P-well regions 24.

FIG. 5 is a cross-sectional view of the trench Schottky diode 40 alongthe longitudinal line A-A′ according to one embodiment of the presentinvention. Referring to FIG. 5, the trench Schottky diode 40 is formedin the N-type epitaxial layer 22 between two trenches 12 b, 12 c (FIG.4) and further between two adjacent P-well regions 24. The Schottkymetal layer 48 is formed on the surface of the N-type epitaxial layer 22and the P-well regions 24 to form the Schottky junction. In the presentillustration, the Schottky metal overlies the P-well regions 24 as wellas the N-type epitaxial layer 22. In one embodiment, the Schottky metallayer 48 is a titanium nitride (TiN) layer. Furthermore, in the someembodiments, additional metal layers are formed on the Schottky metallayer to reduce the resistance of the anode electrode of the Schottkydiode. In the present embodiment, a tungsten (W) layer 51 is formed onthe Schottky metal layer 48 and an aluminum-silicon (Al—Si) layer 52 isformed on the tungsten layer 51. An insulating layer (not shown) may beformed over the Schottky diode structure to provide insulation orpassivation.

Forming the trench Schottky diode in between interspersed P-well regionsprovides many advantages. In particular, the P-well regions function topinch off the Schottky diode current path, thereby limiting the leakagecurrent. The P-well regions also enable control over the electric fieldat the surface of the mesa near the Schottky junction. The performanceof the trench Schottky diode can thus be enhanced.

In embodiments of the present invention, compensation implants may beapplied in the trench Schottky diode structure to enhance the electricalcharacteristics of the Schottky diode, as described above. In oneembodiment, a shallow compensation implant 29 is applied to the topsurface of the N-type epitaxial layer 22 near the Schottky junction. Theshallow compensation implant 29 provides control over the forward biasvoltage and breakdown leakage current of the Schottky diode. In someembodiments, one or more deep pocket compensation implants 35 areapplied to the N-type epitaxial layer 22 away from the Schottky junctionand deep in the mesa structure. The deep pocket compensation implants 35have the effect of controlling the current path of the Schottky diode toreduce leakage current.

FIG. 6 is an isometric view of the trench Schottky diode according to asecond alternate embodiment of the present invention. FIG. 7 is across-sectional view of the trench Schottky diode in FIG. 6 along thelongitudinal line A-A′ according to one embodiment of the presentinvention. Referring to FIGS. 6 and 7, a trench Schottky diode 60 isformed in substantially the same manner as trench Schottky diode 40described above. More specifically, trench Schottky diode 60 is formedin a mesa 27 between two trenches 12 b and 12 c that are only partiallyfilled with a trench conductor layer 13 b and 13 c. Furthermore, P-wellregions 24 are formed interspersed in mesa 27 along the longitudinalaxis of the mesa. In the present embodiment, source contact plugs 26 andoptional P+ body contact diffusion regions 23 are formed in the P-wellregions 24. The Schottky metal layer 68 is formed in a long stripeoverlying the N-type epitaxial layer in mesa 27, the P-well regions 24,as well as the source plugs 26. The source contact plugs 26 enable anohmic contact to be formed between the Schottky metal layer 68 and theP-well regions 24. In this manner, the P-well regions 24 areelectrically connected to the same potential as the anode of theSchottky diode. Accordingly, the trench conductor layer 13 b, 13 c, theP-well region 24 and the anode are all connected to the same electricalpotential. In some embodiments, the trench conductor layer 13 b, 13 c,the P-well region 24 and the anode are electrically connected to theground potential. The trench conductor layer 13 b, 13 c and P-wellregions thus formed provide shielding for the Schottky diode. Inembodiments of the present invention, the anode of the Schottky diodemay be in turn connected to the source of the trench MOSFET formed onthe same semiconductor layer. Trench Schottky diode 60 may furtherinclude a shallow compensation implant 29 and one or more deep pocketcompensation implants 35, as shown in FIG. 7 and described above.

FIG. 8 is an isometric view of the trench Schottky diode according to athird alternate embodiment of the present invention. FIG. 9 is across-sectional view of the trench Schottky diode in FIG. 8 along thelongitudinal line A-A′ according to one embodiment of the presentinvention. Referring to FIGS. 8 and 9, a trench Schottky diode 70 isformed in substantially the same manner as trench Schottky diode 60described above. More specifically, trench Schottky diode 70 is formedin a mesa 27 between two trenches 12 b and 12 c that are only partiallyfilled with a trench conductor layer 13 b and 13 c. P-well regions 24are formed interspersed in mesa 27 along the longitudinal axis of themesa. Source contact plugs 26 and optional P+ body contact diffusionregions 23 are formed in the P-well regions 24. In the presentembodiment, the Schottky metal layer 78 is formed as islands on theN-type epitaxial layer 22 in mesa 27. More specifically, the Schottkymetal islands 78 are formed above the N-type epitaxial layer 22 in mesa27 between adjacent P-well regions 24 and in an area surrounded by anedge termination diffusion region 54. Edge termination diffusion region54 is a P-type region and is formed in the top surface of the N-typeepitaxial layer 22 surrounding the Schottky junction. More specifically,edge termination diffusion region 54 is formed on the perimeter of themesa 27 bounded by adjacent P-well regions 24. In one embodiment, edgetermination diffusion region 54 is formed by P-type ion implantationinto the N-Epitaxial layer 22. Edge termination diffusion region 54 hasthe effect of reducing the electrical field at the corners of theSchottky junction.

In embodiments of the present invention, Schottky diode 70 may furtherinclude a shallow compensation implant 29 and one or more deep pocketcompensation implants 35, in the same manner as described above.

In the present embodiment, Schottky diode 70 includes source plugs 26and P+ body contact diffusion regions 23 in the P-well regions 24. Thesource plugs 26 and the P+ body contact diffusion regions 23 areoptional and one or both may be omitted in other embodiments of thepresent invention. Schottky diode 70 may be formed without any sourceplugs or P+ body contact regions in the P-well regions 24.

FIG. 10 is an isometric view of the trench Schottky diode according to afourth alternate embodiment of the present invention. Referring to FIG.10, a trench Schottky diode 80 is formed in substantially the samemanner as trench Schottky diode 60 described above. More specifically,trench Schottky diode 80 is formed in a mesa 27 between two trenches 12b and 12 c that are only partially filled with a trench conductor layer13 b and 13 c. Furthermore, P-well regions 24 are formed interspersed inmesa 27 along the longitudinal axis of the mesa and source plugs 26 andoptional P+ body contact diffusion regions 23 are formed in the P-wellregions 24. In the present embodiment, the Schottky metal layer 88 isformed as an island overlying the area of the N-type epitaxial layer inmesa 27 between adjacent P-well regions 24. The source plugs 26 may beelectrically connected to the anode of the Schottky diode which can bein turn connected to the source of the trench MOSFET formed on the samesemiconductor layer.

In the present embodiment, Schottky diode 80 includes source plugs 26and P+ body contact diffusion regions 23 in the P-well regions 24. Thesource plugs 26 and the P+ body contact diffusion regions 23 areoptional and one or both may be omitted in other embodiments of thepresent invention. Schottky diode 80 may be formed without any sourceplugs or P+ body contact regions in the P-well regions 24.

The above detailed descriptions are provided to illustrate specificembodiments of the present invention and are not intended to belimiting. Numerous modifications and variations within the scope of thepresent invention are possible. For example, in FIGS. 2, 3 and 10, theSchottky metal layer is shown as being extended across the entire widthof the N-type epitaxial layer between the two adjacent trenches (12 b,12 c). In other embodiments of the present invention, the Schottky metallayer may overlay only a portion of the width between the two trenches,as shown in FIGS. 4 and 6. Similarly, the Schottky metal layer in FIGS.4 and 6 may be extended to cover the entire width of the semiconductorlayer between the two adjacent trenches.

Furthermore, in the above-described embodiments, an N-type trench MOSFETdevice is described and the trench Schottky diode is formed over anN-type epitaxial layer. In other embodiments of the present invention,devices of the opposite polarity type may be formed by reversing thepolarities of the semiconductor layer or substrate, the epitaxial layerand the various diffusion/implant regions. The present invention isdefined by the appended claims.

We claim:
 1. A Schottky diode comprising: a semiconductor substrate of afirst conductivity type; a semiconductor layer of the first conductivitytype and being lightly doped formed on the semiconductor substrate;first and second trenches formed in the semiconductor layer, the firstand second trenches being lined with a thin dielectric layer and beingfilled partially with only one trench conductor layer, remainingportions of the first and second trenches being filled with a firstdielectric layer; and a Schottky metal layer formed on a top surface ofthe lightly doped semiconductor layer between the first trench and thesecond trench to form a Schottky junction, wherein the Schottky diode isformed with the Schottky metal layer as the anode and the lightly dopedsemiconductor layer between the first and second trenches as thecathode, and the trench conductor layer in each of the first and secondtrenches is electrically connected to the anode of the Schottky diode,the trench conductor layer in each of the first and second trenchesbeing insulated by the first dielectric layer in the respective trenchesand being physically isolated from the Schottky metal layer forming theanode of the Schottky diode.
 2. The Schottky diode of claim 1, whereinthe first and second trenches each has a first trench depth, the firsttrench conductor layer extends up to about half or less than half of thefirst trench depth.
 3. The Schottky diode of claim 1, wherein theSchottky metal layer is formed on the semiconductor layer overlaying aportion of the width or the entire width of the semiconductor layer fromthe first trench to the second trench.
 4. The Schottky diode of claim 1,further comprising: a plurality of well regions of a second conductivitytype formed in a top portion of the semiconductor layer between thefirst trench and the second trench, the plurality of well regions beingspaced apart in a longitudinal direction parallel to the longitudinalaxis of the first and second trenches, wherein the Schottky metal layeris formed overlying the plurality of well regions and the semiconductorlayer between the plurality of well regions.
 5. The Schottky diode ofclaim 4, wherein the Schottky metal layer is formed on the semiconductorlayer and the plurality of well regions overlaying a portion of thewidth or the entire width of the semiconductor layer and the wellregions from the first trench to the second trench.
 6. The Schottkydiode of claim 4, further comprising: a plurality of contact plugs, eachcontact plug being formed in a respective well region, wherein theSchottky metal layer is formed overlying the plurality of well regions,the plurality of contact plugs and the semiconductor layer between theplurality of well regions, the Schottky metal layer forming an ohmiccontact with the plurality of contact plugs.
 7. The Schottky diode ofclaim 6, further comprising: a plurality of contact diffusion regions ofthe second conductivity type, each contact diffusion region being formedin a respective well region underneath a respective contact plug.
 8. TheSchottky diode of claim 6, wherein the Schottky metal layer is formed onthe semiconductor layer, the plurality of well regions and the pluralityof contact plugs and covers a portion of the width or the entire widthof the semiconductor layer and the well regions from the first trench tothe second trench.
 9. The Schottky diode of claim 1, further comprising:a shallow compensation implant of a second conductivity type applied atthe top surface of the semiconductor layer between the first and secondtrenches, the shallow compensation implant being applied to adjust theforward bias voltage of the Schottky diode.
 10. The Schottky diode ofclaim 1, further comprising: a deep pocket compensation implant of asecond conductivity type formed in the semiconductor layer between thefirst and second trenches and at a depth away from the top surface ofthe semiconductor layer, the deep pocket compensation implant beingapplied to reduce leakage current of the Schottky diode.
 11. TheSchottky diode of claim 1, further comprising: a plurality of wellregions of a second conductivity type formed in a top portion of thesemiconductor layer between the first trench and the second trench, theplurality of well regions being spaced apart in a longitudinal directionparallel to the longitudinal axis of the first and second trenches,wherein the Schottky metal layer is formed on a top surface of thesemiconductor layer between the first trench and the second trench andoverlies only the semiconductor layer between the plurality of wellregions.
 12. The Schottky diode of claim 1, further comprising: aplurality of well regions of a second conductivity type formed in a topportion of the semiconductor layer between the first trench and thesecond trench, the plurality of well regions being spaced apart in alongitudinal direction parallel to the longitudinal axis of the firstand second trenches; and an edge termination diffusion region of thesecond conductivity type formed in the semiconductor layer along aperimeter bounded by the first and second trenches and adjacent wellregions, wherein the Schottky metal layer is formed overlying thesemiconductor layer in an area bounded by the edge termination diffusionregion.
 13. The Schottky diode of claim 1, wherein the Schottky metallayer comprises a titanium nitride layer.
 14. The Schottky diode ofclaim 1, wherein the semiconductor layer comprises an epitaxial layer ofthe first conductivity type.
 15. The Schottky diode of claim 4, whereinthe first conductivity type comprises N-type conductivity and the secondconductivity type comprises P-type conductivity.
 16. The Schottky diodeof claim 1, wherein the semiconductor substrate comprises a heavilydoped semiconductor substrate of the first conductivity type.
 17. Asemiconductor device comprising a field effect transistor and a Schottkydiode, the semiconductor device comprising: a semiconductor substrate ofa first conductivity type; a semiconductor layer of the firstconductivity type and being lightly doped formed on the semiconductorsubstrate; first and second trenches formed in the semiconductor layer,the first and second trenches being lined with a thin dielectric layerand being filled with a first trench conductor layer being the onlytrench conductor layer in the first and second trenches, the firsttrench conductor layer filling a portion of each of the first and secondtrenches, remaining portions of the first and second trenches beingfilled with a first dielectric layer; a Schottky metal layer formed on atop surface of the lightly doped semiconductor layer between the firsttrench and the second trench to form a Schottky junction; a third trenchformed in the semiconductor layer, the third trench being lined with thethin dielectric layer and being filled with the first trench conductorlayer and a second trench conductor layer, the first trench conductorlayer being insulated from the second trench conductor layer by aninter-layer dielectric layer, the first trench conductor layer filling aportion of the third trench and the second trench conductor layerextending from the inter-layer dielectric to near a top surface of thethird trench; a first well region of a second conductivity type formedin a top portion of the semiconductor layer adjacent the third trench,the first well region extending to a depth near a bottom edge of thesecond trench conductor layer formed in the third trench; and a heavilydoped source region of the first conductivity type formed in the firstwell region adjacent to the sidewall of the third trench, wherein theSchottky diode is formed with the Schottky metal layer as the anode andthe lightly doped semiconductor layer between the first and secondtrenches as the cathode; wherein the field effect transistor is formedwith the semiconductor substrate as a drain electrode, the second trenchconductor layer in the third trench as the gate electrode, the firstwell region as the body region, the heavily doped source region as thesource electrode, and the first trench conductor layer in the thirdtrench as a gate shielding electrode; and wherein the first trenchconductor layer in the third trench is electrically connected to thesource electrode and the first trench conductor layer in each of thefirst and second trenches are electrically connected to the anode of theSchottky diode, the first trench conductor layer in each of the firstand second trenches being insulated by the first dielectric layer in therespective trenches and being physically isolated from the Schottkymetal layer forming the anode of the Schottky diode.
 18. Thesemiconductor device of claim 17, wherein the first, second and thirdtrenches have a first trench depth, the first trench conductor layerextends up to about half or less than half of the first trench depth.19. The semiconductor device of claim 17, further comprising: aplurality of well regions of the second conductivity type formed in atop portion of the semiconductor layer between the first trench and thesecond trench, the plurality of well regions being spaced apart in alongitudinal direction parallel to the longitudinal axis of the firstand second trenches, wherein the Schottky metal layer is formedoverlying the plurality of well regions and the semiconductor layerbetween the plurality of well regions.
 20. The semiconductor device ofclaim 19, wherein the plurality of well regions have the same dopingconcentration and the same depth as the first well region.
 21. Thesemiconductor device of claim 19, further comprising: a plurality ofcontact plugs, each contact plug being formed in a respective one of theplurality of well regions, wherein the Schottky metal layer is formedoverlying the plurality of well regions, the plurality of contact plugsand the semiconductor layer between the plurality of well regions, theSchottky metal layer forming an ohmic contact with the plurality ofcontact plugs.
 22. The semiconductor device of claim 21, furthercomprising: a plurality of contact diffusion regions of the secondconductivity type, each contact diffusion region being formed in arespective well region underneath a respective contact plug.
 23. Thesemiconductor device of claim 17, further comprising: a shallowdiffusion region of the second conductivity type formed at the topsurface of the semiconductor layer between the first and secondtrenches.
 24. The semiconductor device of claim 17, further comprising:a deep pocket diffusion region of the second conductivity type formed inthe semiconductor layer between the first and second trenches and at adepth away from the top surface of the semiconductor layer.
 25. Thesemiconductor device of claim 17, wherein the semiconductor layercomprises an epitaxial layer of the first conductivity type.
 26. Thesemiconductor device of claim 17, wherein the first conductivity typecomprises N-type conductivity and the second conductivity type comprisesP-type conductivity.
 27. The semiconductor device of claim 17, whereinthe semiconductor substrate comprises a heavily doped N-typesemiconductor substrate.